Predictive coding on-sensor compression

Walter D. Leon-Salas, Sina Balkir, Nathan Schemm, Michael W. Hoffman, Khalid Sayood

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


This paper presents the design and measurements a predictive coding on-sensor compression CMOS imager. Predictive coding is employed to decorrelate the image. The prediction operations are performed in the analog domain to avoid quantization noise and to decrease the area complexity the circuit. The decorrelated image is encoded with a bank column-parallel entropy encoders. Each encoder is combined with a single-slope analog-to-digital converter (ADC) to reduce area complexity and power consumption. The area savings resulting from such combination allow to integrate an ADC and entropy encoder at the column level. A prototype chip was fabricated in a 0.35 μm CMOS process. The output of the chip is compressed bit stream. The test chip occupies a silicon area of 2.60 mm x 5.96 mm which includes an 80 x 44 APS array. Tests the fabricated chip demonstrate the validity of the design.

Original languageEnglish (US)
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Number of pages4
StatePublished - 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: May 18 2008May 21 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310


Conference2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/TerritoryUnited States
CitySeattle, WA

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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