Structured graph models: An tool for VLSI design efficient

M. Ancona; K. S. Bagga; E. Bruzzone; L. De Floriani; J. S. Deogun

doi:10.1007/BFb0038508

Structured graph models: An tool for VLSI design efficient

M. Ancona, K. S. Bagga, E. Bruzzone, L. De Floriani, J. S. Deogun

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Hierarchical graph models are a powerful tool for describing VLSI circuits. They combine the representation of a hierarchical decomposition of a circuit with a graph description of its topological structure in terms of components and connections. Structured Graphs are an example of such models. In this paper we consider the graph-theoretic problems of spanning trees and Steiner trees in structured graphs. These have connections with the global routing problems in VLSI circuits.

Original language	English (US)
Title of host publication	Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings
Editors	Naveed A. Sherwani, Elise de Doncker, John A. Kapenga
Publisher	Springer Verlag
Pages	307-312
Number of pages	6
ISBN (Print)	9780387976280
DOIs	https://doi.org/10.1007/BFb0038508
State	Published - 1991
Externally published	Yes
Event	1st Great Lakes Computer Science Conference, 1989 - Kalamazoo, United States Duration: Oct 18 1989 → Oct 20 1989

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	507 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	1st Great Lakes Computer Science Conference, 1989
Country/Territory	United States
City	Kalamazoo
Period	10/18/89 → 10/20/89

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

Access to Document

10.1007/BFb0038508

Cite this

Ancona, M., Bagga, K. S., Bruzzone, E., De Floriani, L., & Deogun, J. S. (1991). Structured graph models: An tool for VLSI design efficient. In N. A. Sherwani, E. de Doncker, & J. A. Kapenga (Eds.), Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings (pp. 307-312). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 507 LNCS). Springer Verlag. https://doi.org/10.1007/BFb0038508

Structured graph models: An tool for VLSI design efficient. / Ancona, M.; Bagga, K. S.; Bruzzone, E. et al.
Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings. ed. / Naveed A. Sherwani; Elise de Doncker; John A. Kapenga. Springer Verlag, 1991. p. 307-312 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 507 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ancona, M, Bagga, KS, Bruzzone, E, De Floriani, L & Deogun, JS 1991, Structured graph models: An tool for VLSI design efficient. in NA Sherwani, E de Doncker & JA Kapenga (eds), Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 507 LNCS, Springer Verlag, pp. 307-312, 1st Great Lakes Computer Science Conference, 1989, Kalamazoo, United States, 10/18/89. https://doi.org/10.1007/BFb0038508

Ancona M, Bagga KS, Bruzzone E, De Floriani L, Deogun JS. Structured graph models: An tool for VLSI design efficient. In Sherwani NA, de Doncker E, Kapenga JA, editors, Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings. Springer Verlag. 1991. p. 307-312. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/BFb0038508

Ancona, M. ; Bagga, K. S. ; Bruzzone, E. et al. / Structured graph models : An tool for VLSI design efficient. Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings. editor / Naveed A. Sherwani ; Elise de Doncker ; John A. Kapenga. Springer Verlag, 1991. pp. 307-312 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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Structured graph models: An tool for VLSI design efficient

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