@inproceedings{f48aa765f7ef4e49a5431686789a16b1,
title = "Structured graph models: An tool for VLSI design efficient",
abstract = "Hierarchical graph models are a powerful tool for describing VLSI circuits. They combine the representation of a hierarchical decomposition of a circuit with a graph description of its topological structure in terms of components and connections. Structured Graphs are an example of such models. In this paper we consider the graph-theoretic problems of spanning trees and Steiner trees in structured graphs. These have connections with the global routing problems in VLSI circuits.",
author = "M. Ancona and Bagga, {K. S.} and E. Bruzzone and {De Floriani}, L. and Deogun, {J. S.}",
note = "Publisher Copyright: {\textcopyright} Springer-Verlag New York Berlin Heidelberg 1991.; 1st Great Lakes Computer Science Conference, 1989 ; Conference date: 18-10-1989 Through 20-10-1989",
year = "1991",
doi = "10.1007/BFb0038508",
language = "English (US)",
isbn = "9780387976280",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "307--312",
editor = "Sherwani, {Naveed A.} and {de Doncker}, Elise and Kapenga, {John A.}",
booktitle = "Computing in the 1990's - 1st Great Lakes Computer Science Conference, Proceedings",
}